From e909f8b8bce541cb0037afa2fb3de5bac2de322e Mon Sep 17 00:00:00 2001 From: "kaf24@firebug.cl.cam.ac.uk" Date: Wed, 14 Dec 2005 19:47:16 +0100 Subject: [PATCH] Fix the issue when guest OS clear TS bit by mov to cr0 instead of clts instruction for floating point context save and restore. clts instruction is already handled in vmx exit handler while vmx_set_cr0 has not handled it yet. Signed-off-by: Xiaofeng Ling --- xen/arch/x86/vmx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/vmx.c b/xen/arch/x86/vmx.c index 553d74429a..ff53fedea2 100644 --- a/xen/arch/x86/vmx.c +++ b/xen/arch/x86/vmx.c @@ -1094,11 +1094,21 @@ static int vmx_set_cr0(unsigned long value) unsigned long eip; int paging_enabled; unsigned long vm_entry_value; + unsigned long old_cr0; /* * CR0: We don't want to lose PE and PG. */ - paging_enabled = vmx_paging_enabled(v); + __vmread_vcpu(v, CR0_READ_SHADOW, &old_cr0); + paging_enabled = (old_cr0 & X86_CR0_PE) && (old_cr0 & X86_CR0_PG); + /* If OS don't use clts to clear TS bit...*/ + if((old_cr0 & X86_CR0_TS) && !(value & X86_CR0_TS)) + { + clts(); + setup_fpu(v); + } + + __vmwrite(GUEST_CR0, value | X86_CR0_PE | X86_CR0_PG | X86_CR0_NE); __vmwrite(CR0_READ_SHADOW, value); -- 2.30.2